# |
NAME |
DIR |
[LSB:MSB] |
SIG |
ATTRIBUTES |
0A
|
fpga_0_DDR2_SDRAM_DDR2_DQS_Div_I_pin |
I |
1 |
fpga_0_DDR2_SDRAM_DDR2_DQS_Div_I |
|
1A
|
fpga_0_DDR2_SDRAM_DDR2_DQ |
IO |
15:0 |
fpga_0_DDR2_SDRAM_DDR2_DQ |
|
2A
|
fpga_0_DDR2_SDRAM_DDR2_DQS |
IO |
1:0 |
fpga_0_DDR2_SDRAM_DDR2_DQS |
|
3A
|
fpga_0_DDR2_SDRAM_DDR2_DQS_n |
IO |
1:0 |
fpga_0_DDR2_SDRAM_DDR2_DQS_n |
|
4A
|
fpga_0_DDR2_SDRAM_DDR2_Addr_pin |
O |
12:0 |
fpga_0_DDR2_SDRAM_DDR2_Addr |
|
5A
|
fpga_0_DDR2_SDRAM_DDR2_BankAddr_pin |
O |
1:0 |
fpga_0_DDR2_SDRAM_DDR2_BankAddr |
|
6A
|
fpga_0_DDR2_SDRAM_DDR2_CAS_n_pin |
O |
1 |
fpga_0_DDR2_SDRAM_DDR2_CAS_n |
|
7A
|
fpga_0_DDR2_SDRAM_DDR2_CE_pin |
O |
1 |
fpga_0_DDR2_SDRAM_DDR2_CE |
|
8A
|
fpga_0_DDR2_SDRAM_DDR2_CS_n_pin |
O |
1 |
fpga_0_DDR2_SDRAM_DDR2_CS_n |
|
9A
|
fpga_0_DDR2_SDRAM_DDR2_Clk_n_pin |
O |
1 |
fpga_0_DDR2_SDRAM_DDR2_Clk_n |
|
10A
|
fpga_0_DDR2_SDRAM_DDR2_Clk_pin |
O |
1 |
fpga_0_DDR2_SDRAM_DDR2_Clk |
|
11A
|
fpga_0_DDR2_SDRAM_DDR2_DM_pin |
O |
1:0 |
fpga_0_DDR2_SDRAM_DDR2_DM |
|
12A
|
fpga_0_DDR2_SDRAM_DDR2_DQS_Div_O_pin |
O |
1 |
fpga_0_DDR2_SDRAM_DDR2_DQS_Div_O |
|
13A
|
fpga_0_DDR2_SDRAM_DDR2_ODT_pin |
O |
1 |
fpga_0_DDR2_SDRAM_DDR2_ODT |
|
14A
|
fpga_0_DDR2_SDRAM_DDR2_RAS_n_pin |
O |
1 |
fpga_0_DDR2_SDRAM_DDR2_RAS_n |
|